Transcription

MSP430 Memory ProgrammingUser's GuideLiterature Number: SLAU265HFebruary 2009 – Revised April 2010

2SLAU265H – February 2009 – Revised April 2010Copyright 2009–2010, Texas Instruments Incorporated

Contents1234. 9MSP430 Programming Via the Bootstrap Loader . 112.1Introduction . 112.2Standard RESET and BSL Entry Sequence . 122.2.1 MSP430 Devices With Shared JTAG Pins . 122.2.2 MSP430 Flash Devices With Dedicated JTAG Pins . 132.2.3 Devices With USB . 132.3UART Protocol . 132.4USB Protocol . 13ROM-Based Bootstrap Loader Protocol . 153.1Synchronization Sequence . 153.2Commands . 153.2.1 Unprotected Commands . 153.2.2 Password Protected Commands . 153.3Programming Flow . 163.4Data Frame . 173.4.1 Data-Stream Structure . 173.4.2 Checksum . 183.4.3 Example Sequence . 183.4.4 Commands – Detailed Description . 183.5Loadable BSL . 223.6Exiting the BSL . 233.7Password Protection . 233.8Code Protection Fuse . 243.9BSL Internal Settings and Resources . 243.9.1 Chip Identification and BSL Version . 243.9.2 Vectors to Call the BSL Externally . 243.9.3 Initialization Status . 253.9.4 Memory Allocation and Resources . 26Flash-Based Bootstrap Loader Protocol . 274.1BSL Data Packet . 274.2UART Peripheral Interface (PI) . 274.2.1 Wrapper . 274.2.2 Abbreviations . 274.2.3 Messages . 284.2.4 Interface Specific Commands . 284.3USB Peripheral Interface . 284.3.1 Wrapper . 284.3.2 Hardware Requirements . 294.4BSL Core Command Structure . 294.4.1 Abbreviations . 294.4.2 Command Descriptions . 304.5BSL Security . 314.5.1 Protected Commands . 314.5.2 RAM Erase . 31Overview of MSP430 ProgrammingSLAU265H – February 2009 – Revised April 2010Copyright 2009–2010, Texas Instruments IncorporatedContents3

www.ti.com4.64.7567894BSL Core Responses .4.6.1 Abbreviations .4.6.2 BSL Core Messages .4.6.3 BSL Version Number .4.6.4 Example Sequences for UART BSL .BSL Public Functions and Z-Area .4.7.1 Starting the BSL from an external application .4.7.2 Function Description .3232333334343434. 355.1Hardware Description . 355.1.1 Power Supply . 355.1.2 Serial Interface . 365.1.3 Target Connector . 375.1.4 Parts List . 38Differences Between Devices and Bootstrap Loader Versions . 396.15xx/6xx BSL Versions . 396.2Special Consideration for ROM BSL Version 1.10 . 416.3BSL Known issues . 416.4BSL FAQ . 49Bootstrap Loader PCB Layout Suggestion . 51MSP430 Programming Via the JTAG Interface . 558.1Introduction . 558.2Interface and Instructions . 558.2.1 JTAG Interface Signals . 568.2.2 JTAG Access Macros . 588.2.3 Spy-Bi-Wire (SBW) Timing and Control . 608.2.4 JTAG Communication Instructions . 648.3Memory Programming Control Sequences . 708.3.1 Start-Up . 708.3.2 General Device (CPU) Control Functions . 738.3.3 Accessing Non-Flash Memory Locations With JTAG . 828.3.4 Programming the Flash Memory (Using the Onboard Flash Controller) . 868.3.5 Erasing the Flash Memory (Using the Onboard Flash Controller) . 918.3.6 Reading From Flash Memory . 948.3.7 Verifying the Flash Memory . 958.4JTAG Access Protection . 958.4.1 Burning the JTAG Fuse - Function Reference for 1xx/2xx/4xx Families . 958.4.2 Programming the JTAG Lock Key - Function Reference for 5xx Family . 978.4.3 Testing for a Successfully Protected Device . 988.5JTAG Function Prototypes . 988.5.1 Low-Level JTAG Functions . 988.5.2 High-Level JTAG Routines . 1008.6References . 105JTAG Programming Hardware and Software Implementation . 1079.1Implementation History . 1079.2Implementation Overview . 1079.3Software Operation . 1089.4Software Structure . 1099.5Programmer Operation . 1119.6Hardware Setup . 1119.6.1 Host Controller . 1119.6.2 Target Connection . 111Bootstrap Loader HardwareContentsSLAU265H – February 2009 – Revised April 2010Copyright 2009–2010, Texas Instruments Incorporated

www.ti.com9.6.39.6.410Internal MSP430 JTAG Implementation10.110.2AHost Controller/Programmer Power Supply . 113Third Party Support . 113. 115TAP Controller State Machine . 115MSP430 JTAG Restrictions (Non-Compliance With IEEE Std 1149.1) . 115. 117Known Issues . 117Revisions and Errata from Previous Documents . 117Errata and Revision InformationA.1A.2SLAU265H – February 2009 – Revised April 2010Copyright 2009–2010, Texas Instruments IncorporatedContents5

www.ti.comList of Figures2-1.Standard RESET Sequence . 122-2.BSL Entry Sequence at Shared JTAG -1.10-1.6. 12BSL Entry Sequence at Dedicated JTAG Pins . 13Bootstrap Loader Interface Schematic .