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7/9/2014MSP430 Assembly ProgrammingProgramming Levels Machine language– Description of instructions in terms of 0’s and 1’s. Thisis the model for the actual contents in programmemory– Normally presented in Hex Notation. Assembly language– Machine language in human-readable form. Allowsbetter control of program High level language– Preferred by most programmers because of its Englishlike syntaxis and notation.1

7/9/2014Example: Blinking LED ProgramObjective: blink led bytoggling of voltage levelsProgramming Machine Language15263871:2:3:4:5:6:7:8:42

7/9/2014Programming Assembly LanguageThere is a one-to-one correspondence between machine languageand assembly language instructionsMSP430 Machine languagestructure (1/3) Length of One, two or three words:– Instruction word– Instruction word - Source Info – Destination Info– Instruction word – (Source or Dest) Info 2 operand instructions with source and destination 1 operand instructions with dest or source 0 operand instruction: Only one: RETI return frominterrupt JUmps3

7/9/2014MSP430 Machine languagestructure (2/3)Two operand instructions (most significant nibble 4 to F)Single operand instruction (most sign. Nibble 1; reti 1300)MSP430 Machine languagestructure (3/3)Jumps: Most significant nibble is 2 o3 ; eight jumpsOPCODE 001Eight conditions for C: 000 . 111Largest jump: - 2 10 bytes.4

7/9/2014Basic Structure of MSP430Assembly instruction (1/3) Mnemonics source, destination– (For 2 operand instructions) Mnemonics Operand– (For 1 operand instructions or jumps) Mnemonics– For instructions reti or 0 operand emulated instructions .b and .w appended to mnemonics differentiateoperand size. Default .w when none– mov.b r4, r5;mov.w r4,r5 mov r4,r5Basic Structure of MSP430 Assemblyinstruction: jump operands (2/3) In interpreters or one-pass assemblers, thejump operand is the number of bytes thatmust be added to current PC (pointing to nextaddress).– Signed 11-bit integer. In two-pass assembler, it is an even address orthe symbolic label name given to the address.5

7/9/2014Basic Structure of MSP430 Assemblyinstruction: general cases (3/3) Operands are written with a syntax associated to theaddressing mode Operands can be– Register names– Integers Integers can be:––––Base ten integers (no suffix or prefix)Base 2 (suffix b or B)Base 16 (suffix h or H, or prefix 0x; it cannot begin with a letter)Base 8 (suffix q or Q)MEMORYLOCATIONSNon MEMORYLOCATIONSMSP430 Addressing modesModeImmediateRegisterSyntax DATA location#XData is XRnIs in RnDirectAbsoluteIndexedIndirectX&XX(Rn)@RnIndirect withautoincrementat address Xat address XAt address Rn XAt address RnAt address Rn. Inaddition [email protected] incremented by datasize after executionNotes: Rn is a register name;SourceOKOKDestinationXOKOKOKOKOKOKOKOKXOKXX is an integer number (valid constant)6

7/9/2014ASSEMBLY PROCESSAssembly process (Two pass)Other text files(headers, .asm, etc)Source FileAssembler*.asmObject fileOther object filesOther files of interestLinkerExecutefileThe linker uploadsdata and execute file inmemory, at addressesspecified by assemblerusing directives.7

7/9/2014Assembly process (1/2): Sourceand assembly To assembly is to convert assembly language to machinelanguage. To dissasembly goes from machine to assembly Source file: text file containing assembly instructions anddirectives– Directive: ‘instruction’ for assembler and linker, not loaded intoprogram memory– Source statement: each line in the source file Object file: file with machine language instructions thatresults from assembler Execute file: machine language file loaded into memory. Itresults from linkerAssembly process (2/2) :Assembler Interpreter: assemblies one line at a time– Line interpreter: only one line Assembler: Usually reads the source fi Two-pass assemblers: allows use of definedconstants, labels, macros, comments, etc.– Read the source once to decode user defined vocabulary Format of source statetment in two-passassembler:– [Label] [mnemonics] [operands] [;comment]8

7/9/2014Important Facts Source statement: A line in the source file Source fields (may consist of only one)LabelMnemonics Operand(s) ;Comment Label always goes on first column Comment always follows a semicolon (;) On the first column, always a label, blank, or acomment, nothing elseDirectives and instructions Instructions are for CPU, loaded and executed– Always the same, irrespectively of the assembler Directives: commands for Assembler– Serve to manage memory, create macros, definedata, etc. The last source statement is the directive END In IAR, traditionally directives are in capitalcase (END, DB, DW, etc), mnemonicinstructions in small case9

7/9/2014Important Directives and pointsORG address :Tells the linker theaddress where to start placingthe data/instruction that follow.DW: Tells the assemblerthat the data following is16-bit sizeReset vector: address of firstinstruction to be fetched.(In this ex. Label ResVector)OTHER GENERAL CONCEPTS10

7/9/2014Constant generators registers R3and R2 in MSP430 For certain immediate mode source values,behavior is similar to register mode by using aconstant generator register. Values #0, #1, #2, #-1 are generated by R3 . Value #4 is automatically generated by R2 Absolute value 0 in 0(Rn) is generated by R2 Change is transparent to user; must be taken intoaccount for timing and instruction size (see ex. 4.4)Constant generator examples Language machine for mov #3, R5 is 4035 0003, two cycles– Instruction word 4035: most significan nibble 4 for mov, least significant 5 for R5 03 indicates immediate mode source, data being the number thatfollows (0003), Language machine for mov #2, R5 is 4325– 3-2: immediate value with R3 generating #2 in word instruction ( 0-01-0) in nibble 2 Language machine for mov.b #2,R5 is 4365– 3-6: immediate value with R3 generating 2 in byte instruction ( 0-1-10) in nibble 611

7/9/2014Byte size Operand (1/2) For memory data, instruction works asrequired– Examples with [0204] 3A2F, [0306] ABCD That is, [0204] 2F, [0205] 3A, [0306] CD, [0307] AB1. mov &0x204, 0x0306 yields [0306] 3A2FThis was a word size operand2. mov.b &0x204,&0x0306 yields [0306] AB2F3. mov.b &0x205, 0x0306 yields [0306] AB3A4. add.b 0X0307,&0205h yields [0204] ABCDByte size operands (2/2) Working in register mode:– When in source, take LSB only.– When in Destination: result goes to LSB, MSB 00 Examples with initial R5 CA50, R6 2345,[0204] ABCD– mov.b R5, 0x0204 yields [0204] AB50– mov.b R5, R6 yields R6 0050– add.b &0x0205, R5 yields R5 00FB12

7/9/2014INSTRUCTIONSMSP430 Instruction Set 27 Core Instructions and 24 emulated instructions Core instructions are the machine native languageinstructions, supported by hardware. Emulated instructions are “macros” translatedautomatically by the assembler to an equivalent coreinstruction– Defined to make programming easier to read and write– Already standard.13

7/9/2014Data transfer instructions mov src, dest( dest src)– mov src,dest mov.w src, dest; mov.b src, dest push src (1. SP SP-2; 2. (SP) src)– push.b only pushes the byte, but moves SP two places. pop dest mov @SP , dest– This is an emulated instruction– pop.b dest moves only byte, but SP SP 2 anyway Verify the your understanding by checking the followinginstructions in your assembler.– push #0xABCD, push.b #0xCD, pop r10, pop.b r11 swpb srcSwaps low and most significant bytes of word src– No byte operation allowedRemarks on Push and Pop (1/3) To recover an original item, the number of pushoperations must equal the number of pop operations– In MSP430 and orthogonal mcu’s, we can “simulate” a popor push adjustment by manipulating SP instead. Example: add #2,SP to get the update of a pop without actuallydoing a pop. When just storing temporarily, for later retrieve, becareful with number and order of stack operations– Pop in reverse order– Never start with a pop because you get garbage.14

7/9/2014Some Remarks on push and pop (2/3) Correctpush R6push R5 other instructionspop R5pop R6 ‘Pop’ the last item you‘pushed’ Incorrect (be careful)push R6push R5 other instructionspop R6pop R5 But you can definemacro swp R5,R6this way! Ha haRemarks on stack management Push and Pop operations are managed withthe stack pointer SP Once a data is popped out, it cannot beretrieved with a stack operation– Use mov for this purpose You can work with items in stack the sameway you work with memory.15

7/9/2014Arithmetic Instructions*** Affect flags ***Normal Flag effects for additionand subtraction C 0 if not carry; C 1 if carry– For addition: C 1 means a carry is generated– For subtraction: C 0 means a borrow is needed; Z 0 if destination is not zero, Z 1 if result is zero (cleared) N most significant bit of destination V 1 if overflow in addition or subtraction, V 0 if notoverflow– Addition overflow if two signed integers of same sign yields a result ofdifferent sign– Subtraction overflow if difference between numbers of different signhas the sign of subtrahend16

7/9/2014Core Addition and SubtractionInstructions -1/4 - (.w and .b ) add src, dest -- Add source to destination– dest dest src addc src, dest -- Add source and carry todestination– dest dest src Carry Flag sub src, dest -- Subtract source fromdestination– dest dest not(src) 1Core Addition and SubtractionInstructions - 2/4- (.w and .b ) subc src, dest or sbb src, dest-- Subtractsource and borrow from destination– dest dest not(src) Carry cmp src, dest -- Compare dest to src– dest not(src ) 1, no change of operands. sxt dest– Sign-extend LSByte to word– Bit(15) Bit(14) Bit(8) Bit(7) Example R5 A587 , sxt R5 R5 FF87 Example R6 A577, sxt R6 R6 007717

7/9/2014Core Addition and Subtraction (3/4):Using Compare (cmp) comp src, dest is usually encoded to compare twonumbers A dest, B src, in order to take a decisionbased on their relationship. Decision is made with a conditional jump. Conditions directly tested in MSP430 are––––(1)(3)(5)(7)If A B then .; (2) If A B then .If A B then . [for signed and unsigned]If A B then . [for signed and unsigned]If A 0 then .Core Addition and SubtractionInstructions - 3/4- (.w and .b ) dadd src, destDecimal addition– Used for BCD formats– dest BCD addition ( dest src Carry)– C 1 if result is greater than 9999 for words or99 for bytes.– V is undefined Example: R5 1238 R6 7684, C 0– dadd.w R5, R6 R6 8922, C 0– dadd.b R5,R6 R6 0022, C 118

7/9/2014Emulated arithmetic operations adc dest addc #0,dest (add carry to dest) dadc dest dadd #0, dest (decimal addition ofcarry) dec dest sub #1,dest (decrement destination) decd dest sub #2,dest (decrement dest twice) inc dest add #1,dest (increment destination) incd dest add # 2, dest (increment dest twice) sbc dest subc #0, dest (subtract borrow) tst dest cmp #0, dest (Ojo C 1, V 0 always)Logic Bitwise InstructionsAnd MSP430 logic bitwiseinstructions19

7/9/2014Effects on Flags Flags are affected by logic operations asfollows, under otherwise indicated: Z 1 if destination is cleared Z 0 if at least one bit in destination is set C Z’ (Flag C is always equal to the invertedvalue of Z in these operations) N most significant bit of destination V 0Core bitwise Instructions affectingflags (1/2)1. and src, dest realizes destsrc .and. Dest2. xor src, dest realizes destsrc .xor. Desta)Most common, but not exclusive, use is for inverting (toggle) selectedbits, as indicated by the mask (source)b) Problem: show that the sequence xor r5,r6 xor r6,r5 xor r5,r6 has theeffect of swapping the contents of registers r5 and r6.3. bit src, dest realizes src .and. dest but only affects flags20

7/9/2014Core bitwise Instructions affecting flags(2/2) Examples starting withR12 35AB 0011 0101 1010 1011R15 AB96 1010 1011 1001 0110and R12,R150010 0001 1000 0010 R15 2182 R12 35ABbit R12,R15 R15 AB96, R12 35ABFlags for both cases: C 1, Z 0, N 0, V 0and.b R12,R151000 0010 R15 0082 R12 35ABbit.b R12, R15 R15 AB96, R1 35ABFlags for both cases: C 1, Z 0, N 1, V 0xor R12,R15xor.b R12,R151001 1110 0011 1101 R15 9E3Dh0011 1101 R15 003DhC 1, Z 0, N 1, V 0C 1, Z 0, N 0, V 0Remarks on bit instruction inMSP430 Since C Z’, either the carry flag C or the zero flag Ccan be used as information about condition. In bit src, dest C 1 (Z 0) means that at least one bitamong those tested is not 0. In bit #BITn, dest, where BITn is the word where allbut the n-th bit are 0, C tested bit– Example R15 0110 1100 1101 1001 thenbit #BIT14,R15 yields C 1 bit 14;bit #BIT5,R15 yields C 0 bit 5.21

7/9/2014Core bitwise Instructions (2)– not affecting flags 4. bis src, dest realizes dest4.src .or. dest, :Sets bits selectd with mask5. bic src, dest realizes destsrc’ .and. Dest :5. clear bits selected with masks. ExamplesR12 35ABh 0011 0101 1010 1011,[0204] 28 (28h)R15 AB96h 1010 1011 1001 0110bis R12,R151011 1111 1011 1111 R15 BFBFh Flags: unchangedbic R12,R151000 1010 0001 0100 R15 8A14h Flags: unchangebis.b R12,R151011 1111 R15 00BFh Flags: unchangedbic.b R12,R150001 0100 R15 0014h Flags: unchangedbis.b #77, &0x204 (01001101.or 00101000 01101101) [0204] 6DEmulated Logic Instructions Manipulating flags:clc bic #1,SR( C 0)clz bic #2,SR( Z 0)cln bic #4,SR( N 0) Inverting a destinationinv dest xor #0FFFFh, destinv.b dest xor.b # 0FFh, destToggles (inverts) all bits in destsetc bis #1,SR( C 1)setz bis #2,SR( Z 1)setn bis #4,SR( N 1)22

7/9/2014Rolls and Rotates in MSP430Rolling (Shifting) and Rotating Data bits Two core instructions:– Right rolling arithmetic: rra dest– Right rotation through Carry: rrc dest Two emulated instructions– Left rolling arithmetic: rla dest add dest,dest– Rotate left through carry: rlc dest addc dest,dest Roll